This invention relates to a CCD image sensor having a plurality of horizontal CCD registers.
The interline transfer CCD (IT-CCD) image sensor is known as a typical example of a CCD image sensor, and is formed by integrating, onto a semiconductor substrate, a plurality of matrix arrayed photo diodes, which serve as image sensing cells, a plurality of columns of vertical CCD registers for reading out the signal charges from the photo diodes, and a horizontal CCD register for reading out the signal charges transferred by the vertical CCD registers. In this type of CCD image sensor, the larger the number of image sensing cells, i.e., picture elements, the higher the frequency of the drive signal for the horizontal CCD register. To prevent such an increase in the drive signal frequency, one of several known approaches is to array two horizontal CCD registers in parallel and to share the signal charges of the vertical CCD registers between these two registers. This system, which is known as a dual line IT-CCD, allows a low-frequency drive signal to be used for driving the horizontal CCD registers.
The manner in which the signal charges, as read out line by line by the vertical CCD registers, are shared between the first and second horizontal CCD register, will now be described.
An "H" clock is first applied to the output gate of the vertical CCD registers, to read out the signal charges of one line from the vertical CCD registers into the channel of the first horizontal CCD register. Then, an "H" clock is applied to the transfer gate between the first horizontal CCD register and the second horizontal CCD register, so that half of the signal charges in the first horizontal CCD register are transferred to the second horizontal CCD register. To effect the sharing of the signal charges between these two registers, a plurality of channel stoppers are formed under the transfer gate between the first and second CCD registers. In this way, the signal charges of the vertical CCD registers in the even-numbered column are transferred to the channel of the second horizontal CCD register, through the channel of the first horizontal CCD register. The signal charges are read out in parallel from the first and second horizontal CCD registers, and are phase-shifted by 180.degree. and summed together, to form an electrical signal representing the picture elements of one line. Subsequently, the same operations are repeated to form a two-dimensional image signal.
The prior dual-line IT-CCD involves a drawback in that the vertical white-and-black pair line appear on the reproduced image. This problem arises due to the fact that the input conditions viz-a-viz the signal charges differ in relation to the first horizontal CCD register, which is located close to the image sensing area, and the second horizontal CCD register, which is located away from the image sensing area. When a large number of picture elements is arrayed, the transfer channels between the first and second horizontal CCD registers are narrowed, which are located between the channel stoppers. In such a case, the narrow channel effect occurs. This is referred to also by K. Orihara, et al., "NEW TECHNOLOGIES IN DUAL CHANNEL READ-OUT REGISTERS FOR HIGH DENSITY CCD IMAGE SENSOR", IEDM Tech. Dig., pp. 365 to 368, 1986. Insufficient distribution of the individual signal charges causes the phenomenon known as cross talk to occur. When the signal charges are insufficiently distributed, they then remain in the first horizontal CCD register, instead of being transferred across the channel thereof to the second horizontal CCD register.